program reads each
in sequence and parses it like a C-preprocessor,
directives so that it can correctly tell which
directives would be used in a compilation.
directives can reference files having other
directives, and parsing will occur in these files as well.
Every file that a
directly or indirectly,
calls a dependency.
These dependencies are then written to a
in such a way that
will know which object files must be recompiled when a dependency has changed.
places its output in the file named
if it exists, otherwise
An alternate makefile may be specified with the
It first searches the makefile for
# DO NOT DELETE THIS LINE -- make depend depends on it.
or one provided with the
as a delimiter for the dependency output.
If it finds it, it will delete everything
following this to the end of the makefile
and put the output after this line.
If it doesn't find it, the program
will append the string to the end of the makefile
and place the output following that.
appearing on the command line,
puts lines in the makefile of the form
sourcefile.o: dfile ...
Where sourcefile.o is the name from the command
line with its suffix replaced with ``.o'',
and dfile is a dependency discovered in a
directive while parsing
or one of the files it included.
will be used in a makefile target so that typing ``make depend'' will
bring the dependencies up to date for the makefile.
will ignore any option that it does not understand so that you may use
the same arguments that you would for
-Dname=def or -Dname
This places a definition for
the symbol becomes defined as ``1''.
This option tells
to its list of directories to search when it encounters
only searches the standard include directories (usually /usr/include
and possibly a compiler-dependent directory).
Replace all of the standard include directories with the single specified
include directory; you can omit the
to simply prevent searching the standard include directories.
Append the dependencies to the end of the file instead of replacing them.
This allows you to specify an alternate makefile in which
can place its output.
Specifying ``-'' as the file name (i.e., -f-) sends the
output to standard output instead of modifying an existing file.
Process file as input, and include all the resulting output
before processing the regular input file. This has the same
affect as if the specified file is an include statement that
appears before the very first line of the regular input file.
Object file suffix.
Some systems may have object files whose suffix is something other
This option allows you to specify another suffix, such as
and so forth.
Object file prefix.
The prefix is prepended to the name of the object file. This is
usually used to designate a different directory for the object file.
The default is the empty string.
Starting string delimiter.
This option permits you to specify
a different string for
to look for in the makefile.
will ensure that every output line that it writes will be no wider than
78 characters for the sake of readability.
This option enables you to change this width.
This option causes
to emit the list of files included by each input file.
Warn about multiple inclusion.
This option causes
to produce a warning if any input file includes another file more than
once. In previous versions of
this was the default behavior; the default has been changed to better
match the behavior of the C compiler, which does not consider multiple
inclusion to be an error. This option is provided for backward
compatibility, and to aid in debugging problems related to multiple
-- options --
encounters a double hyphen (--) in the argument list,
then any unrecognized argument following it
will be silently ignored; a second double hyphen terminates this
In this way,
can be made to safely ignore esoteric compiler arguments that might
normally be found in a CFLAGS
macro (see the
All options that
recognizes and appear between the pair of double hyphens
are processed normally.
The approach used in this program enables it to run an order of magnitude
faster than any other ``dependency generator'' I have ever seen.
Central to this performance are two assumptions:
that all files compiled by a single
makefile will be compiled with roughly the same
and that most files in a single directory will include largely the
Given these assumptions,
expects to be called once for each makefile, with
all source files that are maintained by the
makefile appearing on the command line.
It parses each source and include
file exactly once, maintaining an internal symbol table
Thus, the first file on the command line will take an amount of time
proportional to the amount of time that a normal C preprocessor takes.
But on subsequent files, if it encounters an include file
that it has already parsed, it does not parse it again.
imagine you are compiling two files,
they each include the header file
and the file
in turn includes the files
When you run the command
makedepend file1.c file2.c
It then decides that the dependencies for this file are
file1.o: header.h def1.h def2.h
But when the program parses
and discovers that it, too, includes
it does not parse the file,
but simply adds
to the list of dependencies for
parses, but does not currently evaluate, the SVR4 #predicate(token-list)
preprocessor expression; such expressions are simply assumed to be true.
This may cause the wrong
directives to be evaluated.
Imagine you are parsing two files,
each includes the file
The list of files that
includes might truly be different when
is included by
than when it is included by
arrives at a list of dependencies for a file,
it is cast in concrete.
Todd Brunhoff, Tektronix, Inc. and MIT Project Athena